Home > Article > Backend Development > A brief description of the plug-in controller function of ThinkPHP3.2.2, a brief description of thinkphp3.2.2_PHP tutorial
ThinkPHP supports the calling of plug-in controllers starting from version 3.2.2. You can access the controller defined by a plug-in in the module through a more convenient URL address.
When the plug-in controller variable is passed in the URL, the operation method in the plug-in controller will be automatically located.
The variables of the plug-in controller are set by the parameter VAR_ADDON. The default is addon. For example, we pass it in the URL:
http://serverName/Home/info/index/addon/SystemInfo
Due to the addon parameter being passed in, the User controller here is not the original one
Home/Controller/InfoController.class.php
Instead, the InfoController controller of the SystemInfo plug-in (located under the Home/Addon directory) is called. The file is located at
Home/Addon/SystemInfo/Controller/InfoController.class.php
The definition of the plug-in controller itself is the same as that of an ordinary access controller, for example:
namespace Home\Addon\SystemInfo\Controller; class InfoController extends \Think\Controller{ public function index(){ echo 'Addon SystemInfo'; } }
In this way, we are visiting
http://serverName/Home/info/index/addon/SystemInfo
will be output
Addon SystemInfo
If our plug-in directory is not Addon, but Plugin, then it needs to be defined in the configuration file:
'VAR_ADDON' => 'plugin'
Then the access URL address becomes
http://serverName/Home/info/index/plugin/SystemInfo
It should be noted that: Currently, the plug-in controller only supports module plug-in controller access, and does not yet support global public plug-ins.
Basic components of PLC:
1. Central processing unit: receives and processes data; receives the status and data of on-site input equipment by scanning; self-diagnoses; completes logical arithmetic operation tasks specified in the user program.
2. Memory: There are three types of RAM, EPROM, and EEPROM
EPROM: stores system programs, read-only memory, cannot be changed.
RAM: Stores I/O images and various soft devices. It is a read-write memory with fast storage speed.
EEPROM: It is an erasable read-only memory.
3. Input/output (I/O) interface: It is the connection component between the CPU and field (I/0) devices or other external devices.
4. Power supply:
5. The programmer is used for compiling, editing, debugging, checking and monitoring of user programs.
CPU Principle
The main function of the CPU is to execute programs stored in the main memory, that is, machine instructions. The CPU is composed of a controller and arithmetic unit.
Overview of this Chapter
The focus of this chapter is: the basic components of the CPU and Instruction flow. This involves the core issues of establishing the concept of the whole machine: how the CPU executes instructions, how the computer stores information, and how to control input/output.
1. The basic composition of the CPU
2. Formulate the instruction flow
1. The basic composition of the CPU
When understanding the composition of the CPU, you need to grasp the following points:
(1) ALU component, and its input and output methods.
(2) Used for calculations A set of registers R0-R3 or temporary registers C, D, Z
(3) A set of registers used for control: instruction register IR, program counter PC, program status word register PSW
(4) and A set of registers related to memory access: memory address register MAR, memory data status word register MDR, stack pointer SP
(5) The connection method of the internal bus line, how to send information to it, and how it outputs information
( 6) How the CPU connects to the main memory and I/O devices through the system bus line
Section 3.3.1 gives a simplified internal composition model of the CPU, which is the basis for formulating the instruction process.
2. Formulated Instruction flow
Instruction flow embodies a core content in the working principle of computers: how the CPU executes program instructions. The assessment method is to give a specific instruction, with the internal composition of the model machine CPU as the background, and use instruction sentences to describe its reading and execution. Process. The key is to master the implementation process of several basic addressing methods, distinguish who is the source address, who is the destination address, and what the operation code is
For example: draw up the instruction MOV -(SP),X(R0) Reading and execution process.
Learning content:
3.1 Arithmetic logic operation component ALU
3.2 Operation method
3.3 The composition of the CPU model and its data path
3.4 Timing control method
3.5 Execution of instructions and combinational logic controller
3.6 Microprogrammed controller
Learning objectives:
Understand the logical formula and structure of the full adder, the parallel adder and the carry chain used, and multi-functional arithmetic and logical operations Functions of component SN74181.
Master the initial code fixed-point addition and subtraction operations, shift operations, understand floating point addition and subtraction operations, decimal addition operations, master unsigned integer one-bit multiplication and understand its logical implementation, and master unsigned integers One-digit division, understand floating point multiplication and division operations.
Learning goals:
Master the basic components of the model machine, data path and data transmission, master the basic form of micro-commands.
Understand the functions of the controller, master the instructions The working principle of process and combinational logic controller.
Master the concept of micro-program control, understand the encoding method and sequence control method of micro-instructions, and understand the format of micro-instructions.
Key points and difficulties:
Complementary code fixed-point addition Subtraction operations, unsigned integer one-bit multiplication and division. (Difficulty)
The basic composition of the model machine, data path and data transmission, and the basic form of microcommands.
The instruction flow and the working principle of the combinational logic controller .(Key points)
Class schedule:
9 classes.
Media use:
Use multimedia projection, mainly using electronic teaching plans prepared by PowerPoint.
§ 3.1 Arithmetic and logical operation component ALU
ALU is a powerful combinational logic circuit, sometimes called a multi-functional function generator.
The core of ALU is the adder.
ALU mainly completes fixed-point arithmetic operations and logical operations on binary codes.
§ 3.1.1 Adding unit
Full adder and half adder:
An An-1…Ai…A2 A1 A0
Bn Bn-1…Bi…B2 B1 B0
+ Cn Cn-1…Ci…C2 C1 C0
The full adder is an adder unit that considers three inputs, and the half adder is an adder unit that considers two inputs.
Full addition sum ∑i + carry to high bit Ci
The carry Ci sent in from the low bit
Input quantity
Output quantity
Use a half adder to form a full adder
(1) Half-add summation can be implemented with an XOR gate:
Half-add Sum = AiOBi (logical formula of half adder)
Half adder is also called XOR gate
(2) Full adder = two half adders, its logical formula:
∑i=AiOBiOCi
C i+1=AiBi+(AiOBi)Ci
Because there is a delay time in logic gate circuits, the full adder circuit is a delay component, and its characteristics will affect the speed of the full adder.
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§ 3.1.2 Parallel adder and carry chain structure
Parallel adder: It uses an n-bit full adder to realize two n-bit operands at the same time Add up, the rest of the text>>