imec successfully used ASML High NA EUV lithography machine to pattern logic and DRAM structures for the first time

News from this website on August 8th, Belgian Microelectronics Research Center imec announced yesterday (local time) that its High NA EUV lithography laboratory in cooperation with ASML successfully used the High NA EUV lithography machine to expose the pattern structure of logic and DRAM for the first time. . In terms of logic patterns, imec has successfully patterned a single-exposure random logic mechanism, achieving 9.5nm dense metal lines (note on this site: corresponding to 19nm Pitch), reducing the end-to-end pitch size to less than 20nm:

▲ Dense metal wire. Picture source imec, the same below Not only that, imec has realized random via holes with a center spacing of 30nm, showing excellent pattern fidelity and critical dimension consistency:

▲ Random via holes In addition, imec has passed High NA EUV lithography The machine constructed two-dimensional features with P22nm pitch, showing the potential of the new generation of photolithography technology in two-dimensional wiring:

▲ Two-dimensional features In the field of DRAM, imec successfully patterned integrated SNLP ( Storage Node Landing Pad) and the DRAM design around the bit line, demonstrating the ability of High NA EUV to reduce the number of exposures:

▲ DRAM design Luc Van den hove, president and CEO of imec, said:
These results confirm that High NA EUV lithography technology has always predicted the resolution capability, which can achieve metal layers with a pitch of less than 20nm in one exposure.
Hence, High NA EUV will play a key role in the size scaling of logic and memory technologies, which is one of the important pillars in pushing the roadmap into the "Ami Era".
These early demonstrations are made possible thanks to the establishment of the ASML-imec joint laboratory, which enables our partners to accelerate the introduction of High NA lithography into manufacturing.

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