HBM4 memory standard is about to be finalized: the number of stack channels is doubled compared to HBM3, and the maximum speed is initially agreed to 6.4 Gbps

According to news from this website on July 11, the industry standard setting organization JEDEC Solid State Technology Association issued a press release yesterday (July 10), stating that the HBM4 standard is about to be finalized, with higher bandwidth, lower power consumption, and increased die/die In addition to stack performance, data processing rates are further improved. JEDEC says that in areas such as generative artificial intelligence (AI), high-performance computing, high-end graphics cards and servers, these improvements are critical for applications that require efficient processing of large data sets and complex calculations.

This site breathes from the press release. Compared with HBM3, HBM4 has twice the number of channels per stack and a larger physical size. To support device compatibility, the master can handle both HBM3 and HBM4.
HBM4 will be specified in 24Gb and 32Gb tiers and offer 4-high, 8-high, 12-high and 16-high TSV stacks, with the committee having tentatively agreed on speeds up to 6.4 Gbps and discussing higher frequencies.

The above is the detailed content of HBM4 memory standard is about to be finalized: the number of stack channels is doubled compared to HBM3, and the maximum speed is initially agreed to 6.4 Gbps. For more information, please follow other related articles on the PHP Chinese website!