1c nano generation memory competition: Samsung plans to increase the use of EUV, Micron will introduce molybdenum and ruthenium materials

Korean media The Elec reported that Samsung and Micron will introduce more new technologies in the next generation of DRAM memory, the 1c nm process. This move is expected to further improve memory performance and energy efficiency. As the main leaders in the global DRAM market, Samsung and Micron's technological innovation will promote the development of the entire industry. This also means that future memory products will be more efficient and powerful.

Notes from this site: The 1c nm generation is the sixth 10 nm generation, and Micron also calls it the 1γ nm process. The most advanced memory currently is the 1b nm generation, and Samsung calls 1b nm a 12nm-class process.

Choi Jeong-dong, senior vice president of TechInsights, an analyst firm, said at a recent seminar that Micron will be the first to introduce molybdenum (Mo, pronounced mù) and ruthenium (Ru, pronounced liǎo). These two metals will be used as wiring materials in the word lines and bit lines of memory.

The resistance of molybdenum and ruthenium is lower than that of tungsten (W) currently used, which can further compress the DRAM line width. However, ruthenium also has its own problems: it will react to form toxic ruthenium tetroxide (RuO4) during the process, which brings new troubles to maintenance work. Choi Jeong-dong believes that Samsung and SK Hynix will introduce these two metals one to two generations later.

On Samsung’s side, it will further expand the application of EUV technology

. Samsung is the first among the three major memory manufacturers to introduce EUV, and has applied it to layers such as word lines and bit lines. It is expected that EUV applications will be expanded to layers 8-9 in 1c nm. For Micron, it will also introduce EUV lithography at the 1γ nm node for the first time. Looking to the future of processes below 10nm, Choi Jeong-dong said that the three major manufacturers are studying 3D DRAM and 4F

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DRAM and other routes to achieve further shrinkage. The X-DRAM proposed by Neo Semiconductor and 1T DRAM that does not use capacitors is also a possible direction.

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