How to Efficiently Implement a 64-Bit Atomic Counter Using Only 32-Bit Atomics?

Implementing a 64-Bit Atomic Counter Using 32-Bit Atomics

In embedded systems, creating a 64-bit atomic counter using only 32-bit atomics is often necessary. A common approach is to leverage a generation count with the least significant bit serving as a read lock. However, the question arises whether there are other potential methods and whether the suggested implementation is optimal.

Alternative Approaches

The recommended implementation is a viable approach, but there are alternative methods to consider:

• SeqLock Pattern: This technique utilizes a monotonically increasing generation count with alternating odd and even values. Readers spin until the generation count is stable and the read lock bit (least significant bit) is unset. This method offers improved performance in scenarios with multiple readers but only a single writer.
• Direct 64-Bit Atomic Operations: While less common, some systems may support 64-bit atomic operations natively. In such cases, using atomic operations directly for both halves of the 64-bit counter can eliminate the need for locks or sequence counters.

Design Considerations

Regarding the provided implementation, there are a few areas that can be optimized:

• Atomic Read-Modify-Write (RMW) for Generation Count: Instead of using atomic RMW operations for the generation count, it's possible to employ pure loads and stores with release ordering. This change reduces the overhead associated with RMW operations.
• Atomic Increment for Payload: It's unnecessary to utilize atomic RMW for incrementing the payload; pure loads, increments, and stores suffice. This modification further reduces the overhead of maintaining the counter.

Additional Considerations

• ARM Load-Pair Instructions: Some ARM architectures support efficient load-pair instructions (e.g., ldrd or ldp) that can simultaneously load both 32-bit halves of a 64-bit value. Taking advantage of these instructions can enhance performance.
• Compiler Optimizations: Compilers may not always generate optimal code for atomic operations on large structures like uint64_t. Avoiding atomic access to such structures and instead using volatile keyword and memory barriers can result in more efficient code.

Conclusion

The suggested technique for constructing a 64-bit atomic counter using 32-bit atomics is appropriate, especially in scenarios with a single writer and multiple readers. However, other options like the SeqLock pattern or direct 64-bit atomic operations may be more suitable in specific situations. By addressing the outlined design considerations and exploring additional optimizations, programmers can further improve the efficiency of their implementations.

The above is the detailed content of How to Efficiently Implement a 64-Bit Atomic Counter Using Only 32-Bit Atomics?. For more information, please follow other related articles on the PHP Chinese website!