


Intel explains in detail the Intel 3 process: applying more EUV lithography, increasing the frequency of the same power consumption by up to 18%
According to news from this site on June 19, as part of the 2024 IEEE VLSI seminar activities, Intel recently introduced the technical details of the Intel 3 process node on its official website.
Intel's latest generation of FinFET transistor technology is Intel's latest generation of FinFET transistor technology. Compared with Intel 4, it has added steps to use EUV. It will also be a node family that provides foundry services for a long time, including basic Intel 3 and three variant nodes.

Among them, Intel 3-E natively supports 1.2V high voltage, which is suitable for the manufacturing of analog modules; and the future Intel 3-PT will further improve overall performance and supports finer 9μm pitch TSV and hybrid bonding.
Intel claims that as its "ultimate FinFET process", Intel 3-PT will become the mainstream choice for many years to come, and will be used by internal and external foundry customers together with angstrom-level process nodes.
Compared with Intel3, which only contains 240nm high-performance libraries (note on this site: HP libraries), the Intel4 process introduces the 210nm high-density (HD) library, providing more possibilities in transistor performance orientation.

Intel stated that its basic Intel 3 process can be improved at most compared to the Intel 4 process when using high-density libraries 18% frequency.
In addition, Intel also claimed thatthe basic version of Intel 3 process density has also increased by 10%, achieving a "full node" level improvement.

Intel 3 also provides 12+ in addition to the 14+2 layer of Intel 4 Two new options, 2 and 19+2, are targeted at low-cost and high-performance applications respectively.

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