How to use the compilation command of linux system

The compilation command of the Linux system is "Make". In Linux systems, make is a very important compilation command. Administrators use it to compile and install many open source tools through the command line. Programmers use it to manage the compilation issues of their large and complex projects. Make is used to automate the task of compiling large programs. It can automatically detect the parts of the program that need to be recompiled and issue corresponding compilation instructions.

Introduction to Make

make is a utility program for Linux systems. It is used to manage the automatic compilation tasks of large programs, automatically determine which part of the program needs to be recompiled, and send compilation instructions. Although, we most commonly use it in the compilation of C language programs. However, make is not limited to a specific language. Make can be used in any language that can run the compiler through a shell command. In addition, you can even use make to describe any build task where a file needs to be automatically updated after the files it depends on change.

How Make Works

For those unfamiliar with the mechanics behind it, the Make command accepts targets just like command line arguments. Typically, these operations are stored in a special file called a "Makefile" and correspond to the target. For more information, read this series of articles on how Makefiles work.

The first time the Make command is executed, the Makefile will be scanned to find the target and corresponding dependencies. If these dependencies also need to be compiled into the target, continue to scan the Makefile and establish their dependencies, and then compile. Once the main dependencies have finished compiling, the main target is compiled (this is entered via the make command).

Now, assuming you have modified a certain source file and you execute the make command again, it will only compile the target file related to the source file. Therefore, compiling the final executable file saves a lot of money. time.

>Make command example

The following is the test environment used in this article:

OS —— Ubunut 13.04
Shell —— Bash 4.2.45
Application —— GNU Make 3.81

The following is the content of the project:

$ ls 
anotherTest.c Makefile test.c test.h

The following is the content of the Makefile:

all: test test: test.o anotherTest.o 
    gcc -Wall test.o anotherTest.o -o testtest.o: test.c 
    gcc -c -Wall test.c 

anotherTest.o: anotherTest.c 
    gcc -c -Wall anotherTest.c 

clean: 
    rm -rf *.o test

Now let’s look at some examples of make command applications under Linux:

1. A simple example

To compile the entire project, you can simply use make or follow the make command with the target all.

$ make 
gcc -c -Wall test.c 
gcc -c -Wall anotherTest.c 
gcc -Wall test.o anotherTest.o -o test

You can see the dependencies created for the first time by the make command and the actual targets.

If you check the directory contents again, there are some more .o files and executable files in it:

$ ls 
anotherTest.c anotherTest.o Makefile test test.c test.h test.o

Now, assuming you have made some modifications to the test.c file, use make to compile the project again :

$ make 
gcc -c -Wall test.c 
gcc -Wall test.o anotherTest.o -o test

You can see that only test.o is recompiled, but the other Test.o is not recompiled.

Now clean all target files and executable file test, you can use target clean:

$ make clean
rm -rf *.o test$ ls
anotherTest.c Makefile test.c test.h

You can see all .o files and executable file test All have been deleted.

2. Pass the -B option to make all targets always rebuild

By now, you may have noticed that the make command does not compile those files that have been compiled since the last build. There are no changed files, but if you want to override the default behavior of make, you can use the -B option.

The following is an example:

$ make
make: Nothing to be done for `all’.$ make -B
gcc -c -Wall test.c
gcc -c -Wall anotherTest.c
gcc -Wall test.o anotherTest.o -o test

You can see that although the make command will not compile any files, make -B will force compilation of all target files and the final execution document.

3. Use the -d option to print debugging information

If you want to know what make actually does when it is executed, use the -d option.

Here is an example:

$ make -d | more
GNU Make 3.81
Copyright (C) 2006 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

This program built for x86_64-pc-linux-gnu
Reading makefiles…
Reading makefile `Makefile’…
Updating makefiles….
Considering target file `Makefile’.
Looking for an implicit rule for `Makefile’.
Trying pattern rule with stem `Makefile’.
Trying implicit prerequisite `Makefile.o’.
Trying pattern rule with stem `Makefile’.
Trying implicit prerequisite `Makefile.c’.
Trying pattern rule with stem `Makefile’.
Trying implicit prerequisite `Makefile.cc’.
Trying pattern rule with stem `Makefile’.
Trying implicit prerequisite `Makefile.C’.
Trying pattern rule with stem `Makefile’.
Trying implicit prerequisite `Makefile.cpp’.
Trying pattern rule with stem `Makefile’.
--More--

This is a very long output, you also saw that I used the more command to display the output page by page.

4. Use the -C option to change the directory

You can provide a different directory path for the make command, and the directory will be switched before searching for the Makefile.

This is a directory, assuming you are in the current directory:

$ ls 
file file2 frnd frnd1.cpp log1.txt log3.txt log5.txt
file1 file name with spaces frnd1 frnd.cpp log2.txt log4.txt

But the Makefile of the make command you want to run is saved in the ../make-dir/ directory, you can Do this:

$ make -C ../make-dir/ 
make: Entering directory `/home/himanshu/practice/make-dir’ 
make: Nothing to be done for `all’. 
make: Leaving directory `/home/himanshu/practice/make-dir

You can see that the make command first switches to a specific directory, executes it there, and then switches back.

5. Use the -f option to treat other files as Makefiles

If you want to rename the Makefile file, such as my_makefile or other names, we If you want make to treat it as a Makefile, use the -f option.

make -f my_makefile

With this method, the make command will choose to scan my_makefile instead of Makefile.

The above is the detailed content of How to use the compilation command of linux system. For more information, please follow other related articles on the PHP Chinese website!