How to use the Linux automated build tools make and Makefile

1. The role of make and Makefile

The source files in a project are not counted. They are placed in several directories according to type, function, and module. The makefile defines a series of rules to specify , which files need to be compiled first, which files need to be compiled later, which files need to be recompiled, and even more complex functional operations can be performed.

So, the benefit brought by makefile is - "Automatic compilation". Once written, only one make command is needed, and the entire project is completely automatically compiled, which greatly improves the efficiency. Software development efficiency.

make is a command tool that interprets the instructions in the makefile. Generally speaking, most IDEs have this command, such as: Delphi's make, Visual C's nmake, and GNU's under Linux. make. It can be seen that makefile has become a compilation method in engineering. make is a command and makefile is a file. Use both together to complete the automated construction of the project.

2. Use of make and Makefile

Before understanding dependencies and dependency methods, let’s write a small program in C language.

We created a make.c file and wrote a hello make code.

Then let’s create another Makefile (makefile is also possible, but not recommended).

Then we edit the Makefile and write the following code:

Then we save and exit.

Then we can execute the make command. If it prompts that make does not exist, it is because it is not installed. You can switch to install as root. Installation code: yum install make or sudo install make.

After executing make normally, the following display will appear.

Then we will view the files in the current directory.

We can find that there is an additional executable program make. Then let’s try running ./make.

We will find that this executable program outputs make.

This is our automated build tool, which only needs to be configured in the Makefile. Then type make directly to compile the code. Then let’s try typing make again.

prompts us that the make program is the latest. That is, if you haven't modified or updated the program. Then it will not be compiled for you because your program has not been touched. Why compile it?

Now let’s go back and analyze the code written in the Makefile.

First we divide it into three parts

make

make.c

gcc make.c -o make -std=c99

The relationship between the three is that make depends on make .c generated. The two of them have a dependency relationship, and gcc make.c -o make -std=c99 is the method that make depends on make.c, called dependency method.

What are dependencies and dependency methods?

An analogy.

It’s the end of the month and your living expenses are gone. At this time, you call your dad and tell him: "Dad, it's the end of the month. I have no money." Your father will know at this time and will give you living expenses. Here, you and your father have a father-son relationship, so you are dependent on your father, and there is a dependence relationship between you. And your father gives you living expenses, which is a way for you to rely on your father, so this is Dependence Method. If you call your roommate's father to ask for living expenses at this time, he will tell you to get out. Because you don't have a dependency relationship at all. If you don't have a dependency relationship, there will be no dependency method.

So my program is the same. make is the generated executable program. And it depends on make.c because it is compiled from make.c. The dependent method is to execute the command gcc make.c -o make -std=c99.

The principle of dependency

• make will look for a file named "Makefile" or "makefile" in the current directory.

• If found, it will find the first target file (target) in the file. In the above example, it will find the file "hello" and use this file as the final target. document.

• If the hello file does not exist, or the file modification time of the subsequent test.o file that hello depends on is newer than the test file (you can use touch to test), then, he The command defined later will be executed to generate the test file.

• If the test.o file that test depends on does not exist, then make will look for the dependency of the test.o file in the current file. If it is found, it will follow that rule. Generate test.o file. (This is a bit like a stack process)

• Of course, your C file and H file exist, so make will generate the test.o file, and then use test.o The file declares the ultimate task of make, which is to execute the file test.

• This is the dependency of the entire make. Make will look for file dependencies layer by layer until the first target file is finally compiled.

• During the search process, if an error occurs, for example, the last dependent file cannot be found, then make will exit directly and report an error, and for the error of the defined command , or the compilation is unsuccessful, make simply ignores it.

• make only cares about the dependencies of files, that is, if after I find the dependencies, the file after the colon is still not there, then I'm sorry, I won't work.

Cleaning

When we usually write code, we often need to compile and execute the code repeatedly.

Before recompiling next time, you need to clean up the executable program generated last time. However, you may make a mistake during cleaning and accidentally delete the source file, which may cause problems again.

So do we have a solution? The answer is of course.

We continue to edit the Makefile.

We added

.PHONY:clean

clean:

	rm -f make

on the original basis. So what is the role of PHONY?

.PHONY is modified with a pseudo target, and the pseudo target is always executed. clean is a self-defined make command. The usage method is make clean

Then let’s try this command

We can see that it has been cleaned up, so why is the pseudo target always executed? Let's run it multiple times and see.

We can execute it all the time, so what if we execute make multiple times?

We will find that after make is executed once, it cannot be executed because it is not modified by .PHONY. Then I modify it with .PHONY and try again.

Then we save and exit, execute make

# we can see It was performed many times. But I don't think this is necessary, because the file has not been modified. Recompiling makes no sense, so it is not recommended to add .PHONY

to automated compilation. We save and exit, and execute make

# multiple times.

##We can see that it is executed multiple times. But I don't think this is necessary, because the file has not been modified. Recompiling makes no sense, so it is not recommended to add

.PHONY to automated compilation.

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