Taking stock of 20 key indicators for autonomous driving AI chip selection

As the core component of autonomous driving and the "brain" of autonomous driving, the central controller usually needs to be connected to multiple external cameras, millimeter wave radar, lidar, IMU and other equipment. Its completed functions include Image recognition, data processing, etc.

Domain controller is an intelligent hardware. In order to complete complex AI calculations and intelligent control, the hardware level needs to undertake AI processing that requires huge computing power such as environment perception and deep learning. Chips, CPUs responsible for control decision-making and logical operations, and MCUs responsible for functional safety and vehicle control; the software level includes operating systems, middleware, and application layer AI algorithms.

The three-part chip at the hardware level is also called three important chips:

The first part is usually the GPU or TPU, responsible for large-scale floating point numbers Parallel computing requirements are mainly used for environmental perception and information fusion, including the identification, fusion, and classification of camera, lidar and other sensor information, such as Xavier's GPU unit and Ascend 310.

The second part is mostly ARM architecture, similar to CPU, mainly responsible for logical operations and decision-making control, and processing high-precision floating-point serial calculations.

The third part is mainly responsible for reliability and vehicle control, that is, functional safety and redundant monitoring. It does not require high computing power, but reliability must be guaranteed, ISO26262 The grade requirement is ASIL-D. Currently, Infineon’s TC297 or TC397 are commonly used.

Software level application layer AI algorithms are generally developed by car manufacturers or OEMs themselves, which reflects vehicle performance and differentiation; middleware is generally provided by domain controller developers , similar to ROS, mainly includes some interface drivers and optimized deployment of the operating system.

In terms of operating system, Huawei uses the self-developed Hongmeng system, and the MDC platform is compatible with Adaptive AUTOSAR; QNX is currently the best and only choice for automotive grade, but it faces high costs; Linux and Autoware have gained the most users due to open source, especially Linux. With its strong engineer base and ecosystem, coupled with ROS's many years of application foundation, operating systems based on the Linux kernel are currently very popular.

About autonomous driving AI chip selection

Currently there are not many AI chips to choose from on the market, especially those that have reached mass production, the only ones are Tesla, NVIDIA, and Mobileye. Except for Tesla's self-developed and self-used products, other brands can currently obtain test samples through cooperative development.

Take NVIDIA Xavier as an example. Relatively speaking, because NVIDIA Xavier was launched earlier and the ecological layout is relatively complete, it can be used by developers. Quickly build systems and develop AI applications, so there are many companies designing domain controllers based on Xavier modules.

XavierSoC has a maximum computing power of up to 30TOPs. It contains Valta TensorCore GPU, eight-core ARM64 CPU, dual NVDLA deep learning accelerator, image processor, visual processor and video processor. A variety of different processors enable it to process dozens of algorithms simultaneously and in real time for sensor data processing, environment perception, positioning and mapping, and path planning.

The internal structure of the chip is shown in the figure below:

Xavier provided by NVIDIA is the core module. Its interface is shown in the figure below:

##Key indicators of the chip

1)Core: The core is usually the center of space. On the one hand, it facilitates communication between the automatic driving controller and peripheral sensors and actuators, and at the same time, it also uses the periphery to protect it. Core emphasizes the running state. Core-down usually refers to a problem in CPU calculation. Core emphasizes the core function of the overall external function of the automatic driving controller.

2) DMIPS: Mainly used to measure integer computing capabilities. It includes the number of instruction sets that can be executed per second, and the number of tasks that these instruction sets can achieve per second when implementing my test program. This capability is determined by the CPU architecture, memory access speed and other hardware characteristics. Decide. It is a unit that measures the relative performance of the CPU when running the corresponding test program (in many autonomous driving chip evaluation situations, people are accustomed to using MIPS as the unit of this performance indicator).

3) Memory: The main functions of the memory management unit include: virtual address to physical address mapping, memory access permission control, cache support, etc.;

4) DataFlash: DataFlash is a large-capacity serial Flash memory product launched by the American ATMEL company. It is manufactured using Nor technology and can be used to store data and program codes. Compared with parallel Flash memory, it requires fewer pins, is small in size, easy to expand, simple to connect to a microcontroller or controller, and works reliably. Therefore, serial Flash controllers similar to DataFlash are increasingly used in automatic driving controllers. Products and measurement and control systems are under evaluation.

5)ISP: As the core of the visual processing chip, ISP’s main functions include AE ​​(automatic exposure), AF (automatic focus), AWB (automatic white balance), image noise removal, LSC (Lens Shading Correction), BPC (Bad PixelCorrection), and finally save the Raw Data and pass it to videocodec or CV, etc. Better image effects can be obtained through ISP, so the requirements for ISP in autonomous vehicles are very high. For example, dual-channel or even three-channel ISPs are beginning to be integrated. Generally speaking, ISP is integrated into the AP (for many AP chip manufacturers, this is a key part of differentiated competition), but as needs change, independent ISPs also appear. The main reason is that it can be configured more flexibly. At the same time, it makes up for and cooperates with the deficiencies of the ISP function in the AP chip.

#6) Computing power: The realization of autonomous driving requires the collection of information about the road environment by environment-aware sensors, and the collected data is transmitted to the car's central processor for processing. To identify obstacles, feasible roads, etc., based on the recognition results, plan the path, set the vehicle speed, and automatically control the vehicle's driving. The entire process needs to be completed in an instant, and the delay must be controlled at the millisecond or even microsecond level to ensure the safety of autonomous driving. To achieve the effects of instantaneous processing, feedback, decision-making, planning, and execution, the computing power requirements of the central processor are very high.

In autonomous driving, visual processing consumes the most computing power, accounting for more than half of the total computing power requirements. Each time the autonomous driving level increases, the computing power is greatly reduced. demand has increased at least tenfold. The L2 level requires 2 TOPS of computing power, L3 requires 24 TOPS of computing power, L4 is 320TOPS, and L5 is 4000+TOPS.

Computing power alone is not enough. Considering the complexity of automotive applications, automotive processors also need to consider computing power utilization and whether to pass the car regulations and safety standards, etc. The theoretical value of computing power depends on the calculation accuracy, the number of MACs and the operating frequency.

The theoretical computing power is calculated based on the accumulation of multiplication operations of the Net convolution layer. Each multiplication and addition (MAC) in the convolution layer is calculated as two OPS, and the amount of convolution operations Accounting for more than 90% of DL NET, other auxiliary operations or operations of other layers are ignored. The total number of multiplication operations of all convolutional layers of SSD is 40G MACs, so the theoretical computing power is 80GOPS.

Among them,

#The real value and the theoretical value are greatly different. Consider other computing layers and hardware The actual utilization rate is higher. The most important factors that determine the true value of computing power are memory (SRAM and DRAM) bandwidth, the actual operating frequency (i.e., supply voltage or temperature), and the batch size of the algorithm.

7) Power consumption: In the highest performance mode, if the chip power consumption level of the automatic driving controller is high, even if its own performance is strong, it will cause some unpredictable hidden dangers, such as The heat increases exponentially and the power consumption rate increases exponentially. These results are undoubtedly a "nuclear bomb" especially for new energy vehicles. Therefore, we need to fully consider its power consumption indicators in the early design of autonomous driving chips.

8) 3D GPU: GPU is designed based on large throughput and is used to handle large-scale parallel computing. The GPU control unit can combine multiple accesses into fewer accesses. GPUs use more transistors for execution units instead of complex data caches and instruction control like CPUs. Because GPUs have super floating-point computing capabilities, they can be used in image or video processing applications at the front end of smart cars. They are also increasingly used in mainstream designs for high-performance computing in central controllers.

9) Rich IO interface resources

The main control processor of autonomous driving requires rich interfaces to connect various sensors equipment. At present, the common autonomous driving sensors in the industry mainly include: cameras, lidar, millimeter wave radar, ultrasonic radar, integrated navigation, IMU and V2X modules.

• The main interface types for cameras are: MIPI CSI-2, LVDS, FPD Link, etc.
• Lidar is generally connected through an ordinary Ethernet interface.
• Millimeter wave radars transmit data through the CAN bus
• Ultrasonic radars basically transmit data through the LIN bus
• The common interface for integrated navigation and inertial navigation IMU is RS232
• V2X modules generally use the Ethernet interface to transmit data

In addition to the IO interfaces required by the above sensors, other common high-speed interfaces and low-speed interfaces are also required, such as: PCIe, USB, I2C, SPI, RS232, etc.

10) PCIe: As the local bus of the CPU, its biggest feature is high data transmission throughput and low latency.

11)SaftyGoal: The functional safety goal is the core design requirement of the entire autonomous driving central controller. Due to its impact on the single point failure analysis results in the entire autonomous driving function design, In the early stage of hardware design, it is necessary to fully consider whether it can fully meet the functional safety design requirements of the system for hardware.

12) OTA: Remote upgrade repairs software faults for users, greatly shortens the time of intermediate steps, enables the software to reach users quickly, and at the same time can add new functions to the vehicle and broaden "services" and “operational” categories. Therefore, whether the central controller chip supports OTA is indispensable for reducing the costs of automobile manufacturers and users, including the recall costs of automobile manufacturers, the time cost of users, increasing the freshness of users, and increasing the added value of vehicles.

13) Package type: The controller package size, pin definition, etc. affect the installation form of the overall driving controller, and also affect the distribution of connections to peripheral components. In addition, whether the interface is waterproof? If it is waterproof, the installation environment of the controller can be relatively free. However, the current domain control interfaces are not waterproof.

14) Temperature/Voltage: The temperature control range of the controller includes its storage and use ambient temperature, and if the actual vehicle is confirmed later, the millimeter wave controller assembly layout area storage and use If the ambient temperature is higher than this value, a certain degree of rectification and upward adjustment is required on this basis to meet OEM requirements, and the supplier needs to ensure that no recalls are caused due to hardware design defects. Especially when the computing power reaches more than 100 and the power consumption exceeds 60W, the temperature rise will most likely require active cooling to ensure that the heat can be transferred out in time without affecting the normal operation of the controller. Active cooling generally includes: fan cooling and water cooling.

15) Car regulations and functional safety: Compared with consumer electronics products, automotive chips have the highest requirements in terms of safety and reliability.

Automotive chips have been working in harsh environments with high and low temperatures of "-40℃ to 125℃" and severe vibration for many years. In order to ensure that automotive electronic products meet high quality requirements for operating temperature, reliability and product life, , the International Automotive Electronics Council (AEC) has established relevant quality certification standards, among which AEC-Q100 is a certification standard for automotive integrated circuit stress testing. After years of development, the AEC-Q100 standard has become the de facto industry standard for automotive electronic products in terms of reliability and product life.

In addition to meeting vehicle regulatory requirements, autonomous driving chips also need to meet the certification requirements for "Function Safety (Fusa)" defined by the ISO 26262 standard. Functional safety's design requirement for chips is to find and correct chip failures as much as possible (divided into: system failures and random failures). System failure is essentially a defect in product design, so it mainly relies on the process specifications of design and implementation, while random failure relies more on the special failure detection mechanism in chip design.

ISO 26262 divides safety levels, the most common ones are ASIL-B and ASIL-D. ASIL-B requires the chip to cover 90% of single-point failure scenarios, while ASIL-D requires 99%. The larger the chip area and the more transistors, the higher the corresponding failure rate.

16) Chip system: For example, whether the controller supports the integrated control method of MCU+MPU, or only supports single-chip control.

17) Supply chain security: Greater market demand has led to shortages in the semiconductor supply chain and production capacity, including various "natural disasters" that disrupt the normal production rhythm of semiconductors, and the gap between demand and production capacity The conflict is difficult to resolve in the short term. For

In the context of such a tight global chip supply chain, it is also very challenging for domain controller suppliers to ensure the supply chain. When OEMs select domain controller suppliers, the supply capabilities of their partner chip manufacturers are also important considerations.

In 2022, chip shortages are still affecting the automotive industry. Some OEMs have begun to think about new ideas for semiconductor supply, and some have even bypassed Tier 1 and directly found chip design manufacturers. More in-depth OEMs have begun to participate in the research and development process of chip design. For example, many car companies have established strategic partnerships with autonomous driving AI chip manufacturers such as Black Sesame and Horizon. What's more, they directly penetrate into the semiconductor supply chain and introduce chip design into the main engine factory. This model is called the "OEM-Foundry-Direct" model, and representative companies include Tesla, BYD, etc.

18) Market positioning: To choose what kind of main control chip, you must first look at the market positioning of the domain controller: what functions it intends to implement, and in what price range it is configured. on the car model.

If the goal is to provide assisted driving and make an L1~L2 product, and it is volume-based, you will be very sensitive to cost when selecting chips. For such domain control products, just choose mid- to low-end chips.

"If the goal is to create a self-driving car in L4-level limited scenarios, then customers may be more inclined to create a customized product. For example, positioning Robotaxi plans to adopt an operation model, and the purpose is to polish the algorithm first. Its volume will not be particularly large, so when choosing a chip, it is relatively less sensitive to cost, but the performance is required to be good enough and stable enough. "

19) Roadmap of the chip: Liu Wei, deputy general manager of Neusoft Reach, mentioned: "From the perspective of cooperation with chip companies, it will depend on whether it is a mainstream chip. Do manufacturers have continuous product roadmaps? For example, some chip manufacturers may have developed a good chip, but it has not been updated subsequently. Then there will be a lot of iteration and upgrade of subsequent products based on this chip. Big problem."

Similarly, Li Maoqing, the person in charge of the intelligent driving system design of Joyson Electronics, also mentioned the same point of view: "Selection of hardware solutions in domain controller system design. In addition to paying attention to the functional performance of the chip itself, you also need to fully understand the chip company's product roadmap, whether there is a flexible family chip series, and whether subsequent chips can be upgraded on the hardware platform PIN to PIN, so as to improve the hardware performance. while reducing development costs?”

20) Chip ecology (tool chain): Whether the chip's entire software tool chain or the development of some algorithms can meet customer needs. In other words, what is the ecology of the chip? Whether there is a good ecosystem that can support customers to implement practical development is also one of the important considerations for OEMs or Tier1 when choosing chips.

Nvidia’s chip ecosystem is relatively leading in the industry. Its ecosystem includes developers, available application software, and rich tools and libraries:

• can provide a wealth of software algorithm talents for the automotive field;
• has trained a large number of algorithm models and related application software in the general AI field;
• The unified hardware and underlying software interface architecture (CUDA-X) can be easily transplanted to the automotive field;
• Due to a large number of users, Partners contribute a large number of libraries and tools to the CUDA platform.
  

Zhixing Technology Hardware R&D Director explained: “Many OEMs are now using NVIDIA’s Orin chip, except that it is a large Another important reason for the computing power platform is that it can provide the entire software tool chain, and even some underlying codes and some algorithm codes; developers can make more adaptations on it and develop better To develop an advanced autonomous driving computing platform that can be implemented. In addition to the chip itself, choosing a chip is more about choosing an ecosystem.”

##As mentioned above for autonomous driving domain controllers. There are several important factors in the selection process. We conducted a statistical analysis on the mainstream controller chips in the market and obtained the following comparison table of analysis results:

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